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Wrong answer in A+ Core 1

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I see a mistake here... Anyone can confirm?
One memory controller per CPU (usually integrated):
• In most modern architectures (Intel since Nehalem, AMD since Athlon 64), the memory controller is built into the CPU, not the motherboard chipset.
• That controller can support multiple channels (dual, quad, even octa-channel), but it’s still one controller per CPU socket.
Multi-socket motherboards: (not explicitly defined)
• If a motherboard supports more than one CPU socket (like in servers), then each CPU has its own integrated memory controller.
• So a dual-socket server board would effectively have two memory controllers, one per CPU.
• Older designs (pre-2003 Intel):
• The memory controller used to reside in the northbridge chipset on the motherboard. In those cases, there was still typically one controller per system, not multiple.

I think this question needs re-phrasing